HPSV Logo HPSV
Hochparallele Software-Verifikation nebenläufiger Anwendungen in der Automobilindustrie

Overview

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Project duration
February 2016 - January 2019
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Funders

Description

The efficient use a growing number of CPU cores in embedded devices and at the same time high safety demands for such systems pose a challenge to industry and academia. The aim of this project is to build an HPC-platform for the verification of complex safety requirements for software. On one hand, we open a new field of application for high performance computing. On the other hand, we investigate the efficient use of current and emerging HPC-architectures.


The project has the following four main goals:
  • Highly scalable software verification and concurrency analysis for embedded applications in the automotive industry,
  • The development of new ways to scale of integer dominated applications with non-regular communication patterns,
  • The build-up of competences for the manycore- and exascale-optimisation of the mentioned applications, concurrency analysis, and software verification,
  • The transfer of the developed tools and processes into generic services of HPC-consulting for further applications.


The involvement of industrial partners on the HPC and application end enables us to provide a chain of competence from hardware (Intel, Cray) and its efficient use (ZIB), via formal verification methods (CAU), up to the automotive industry (MES, SYMTA). The developed platform is public and will be maintained.

Partners

Contact

Prof. Dr. Dirk Nowotka

Administrative contact

Universität Kiel
Institut für Informatik
AG Zuverlässige Systeme
Christian-Albrechts-Platz 4
24118 Kiel

Thorsten Ehlers

Technical contact

Universität Kiel
Institut für Informatik
AG Zuverlässige Systeme
Christian-Albrechts-Platz 4
24118 Kiel